Spectrum equalisation performance
A Creative Approach Leveraging CFIR Sparse Mode

From Mizhou (Michelle) Tan, Principal Software Applications Engineer, and Carroll Speir, Senior Principal System Design/Architecture Engineer 11 min Reading Time

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Building upon the fundamentals from Part 1 of this series, Part 2 presents creative techniques for maximising equalisation performance to overcome the PFILT and CFIR tap limitation in Apollo MxFE architecture. 

(Source:  Pete Linforth on Pixabay)
(Source: Pete Linforth on Pixabay)

A two-stage equalisation approach that combines PFILT and CFIR filtering is first introduced to demonstrate the performance improvement by distributing the equalisation across multiple DSP stages. Then, a more advanced technique that maximises the equalisation performance is presented. It leverages CFIR sparse mode and multiple parallel CFIR blocks to effectively increase the number of available equalisation taps.