As aerospace and defence platforms become increasingly software-defined, development teams face more software and reuse, tighter schedules, expanding safety and cybersecurity requirements, and growing volumes of verification evidence. Multi-core and multi-SoC architectures add timing, interference and debug challenges, while certification requires auditable traceability from requirements through code and tests.

This webinar explores practical ways to keep DO-178C verification and compliance from becoming a late-stage bottleneck. It focuses on an integrated workflow that connects requirements traceability, static analysis, unit and integration testing, coverage and compliance reporting, hardware debug, trace and timing analysis directly to certification evidence. Further topics include combining hardware trace with instrumentation to meet coverage goals, analysing multicore execution behavior, and bringing automated checks into CI/CD pipelines, including virtual-target testing before hardware is available.

Attendees will gain a clear framework for DO-178C compliance that balances engineering velocity, assurance and program risk.

Get answers to the following questions in the webinar:

• End-to-end, auditable traceability from requirements through code and tests
• Static analysis, unit and integration testing, plus automated coverage and compliance reporting
• Combining hardware trace with instrumentation to meet coverage goals
• Analyzing timing, interference and execution behavior on multicore and multi-SoC systems
• Automated checks in CI/CD pipelines, including virtual-target testing before hardware is available
• The business impact: earlier defect discovery, more efficient change impact analysis, less manual evidence handling and better visibility into certification progress

Your Speaker

Steve

Product Marketing Manager
TASKING GERMANY GmbH

Bildquelle: TASKING GERMANY GmbH